1. Field of the Invention
The present invention relates to the fabrication of semiconductor components, and more particularly to machines for masking and exposing semiconductor wafers on both a front and a rear surface.
2. Discussion of the Related Art
In the field of semiconductor manufacturing, one of the basic operations is forming masking layers on semiconductor wafers. Such masking layers are obtained by depositing on the wafer surface a layer of a photosensitive material, hereinafter referred to as a resist, that is exposed through a selected mask, the resist being such that its exposed portions subsequently have etching properties that are selective with respect to the non exposed portions.
Conventionally, semiconductor wafers are subject to masking operations on only one of the front or rear surfaces. However, in some devices, for example in power components, masking operations must be carried out on both the front surface and rear surface of the wafer. For this purpose, masking and exposure machines that provide simultaneous exposure, through selected masks, of both the front and rear surfaces of a wafer, have been developed. Such masks have to be aligned with the wafers, as well as with the masks used during previous masking steps.
To achieve this purpose there is formed on the wafer and on each mask, alignment marks (or keys) that allow for the appropriate positioning of the masks with respect to each other and with respect to the wafer prior to carrying out an exposure step.
By way of example, FIGS. 1A, 1B and 1C are a bottom view of an upper mask 1, a bottom view of a silicon wafer 2, and a top view of a lower mask 3, respectively. Each mask includes an operative area, 5 and 6, respectively, that corresponds to the surface area of wafer 2. Each operative area has been drawn cross-ruled because a mask commonly includes a plurality of identical etching patterns that are repeated in order to simultaneously form identical etching patterns on the wafer which is subsequently partitioned into a plurality of identical chips. An etching pattern is for example within a square M1 on mask 1 and within a square M3 on mask 3. The masks further include determined areas reserved for test patterns or alignment patterns. Such alignment patterns are illustrated as crosses labeled as K1 on mask 1, K2 in wafer 2 and K3 on mask 3. Generally, each mask includes two alignment patterns K. The alignment patterns K2 formed on the wafer result from successive etching operations on the wafer.
FIG. 2 schematically represents a portion of an overall structure of a prior art exposure machine which is, for example, fabricated by Karl Suss company (Suss MA 25). In this machine, the lower mask 3 is held by a first support 10 whose translation and orientation (X, Y, .THETA.) can be adjusted with respect to a second support 11, whose translation and rotation are in turn adjustable with respect to the frame 12 of the machine. The upper mask 1 is fixed through a set of telescopic rods 14 (one of which only is shown) to the second support 11, so that mask 1 can be moved parallel with respect to itself and to mask 3 to allow movement away from or closer to mask 3. A conveying arm 16 allows for the introduction of wafer 2 between masks 1 and 3, for maintaining the wafer in close vicinity to mask 3, and for laying the wafer upon mask 3. A first optical system projects a parallel exposure light beam 20 onto the wafer through the upper mask 1; a second optical system projects a parallel exposure light beam 21 onto the wafer through the lower mask 3.
The alignment mode of the masks in this machine is schematically illustrated in FIGS. 3A, 3B and 3C.
As shown in FIG. 3A, during a first step, before the silicon wafer 2 is introduced between the upper and lower masks, the telescopic rods 14 are activated so that mask 1 is disposed, with respect to mask 3, substantially at a position it will occupy once the wafer is introduced and immediately prior to the exposure step. Then, by following an optical path, that corresponds for example to the path of the light beam 21, a user examines through a microscope the alignment of keys K1 and K3 and acts on the position of support 10 with respect to support 11 to obtain the desired alignment between the masks.
During a second step, illustrated in FIG. 3B, mask 1 is raised by acting on the telescopic rods 14 and wafer 2 is introduced over and in the close vicinity of mask 3 by the conveying arm 16. Then, with the same microscope as previously used, the keys K3 of the lower mask are aligned with respect to the alignment keys K2 of the wafer by an X, Y and .THETA. adjustment of support 11 with respect to base 12. It will be noted that during this adjustment, masks 1 and 3, that are linked by rods 14, are simultaneously moved by the same values such that they remain within the alignment as set by step 1. Then wafer 2 is laid upon mask 3, the conveying arm 16 is removed, and the upper mask is moved closer to the wafer. The alignment operation being thus completed, the wafer is ready to be exposed on both the front and rear surfaces.
A problem with this method and apparatus according to the prior art is that once the system is ready for exposure, as shown in FIG. 3C, it is not possible to check the alignment between keys K1 and K3 since wafer 2 cuts off the optical path between these marks.
In practice, users have noticed that machines such as above described generally operate suitably. However, sometimes, misaligned sequences of exposures occur. Such a misalignment is often a result of a shift of mask 1 while it is moved upward and downward.